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Philips Semiconductors 74ALVC125 - 74ALVC125 (Philips Semiconductors) - Quad buffer/line driver; 3-state
| Наименование: | 74ALVC125 |
|---|---|
| Производитель: | Philips Semiconductors |
| Файл: | 74ALVC125_Philips Semiconductors.pdf |
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| Описание: | INTEGRATED CIRCUITS DATA SHEET 74ALVC125 Quad buffer/line driver; 3-state Product speciп¬Ѓcation 2002 Nov 18 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state FEATURES • Wide supply voltage range from 1.65 to 3.6 V • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V) • 3.6 V tolerant inputs/outputs • CMOS low power consumption • Direct interface with TTL levels (2.7 to 3.6 V) • Power-down mode • Latch-up performance exceeds 250 mA • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 В°C. SYMBOL tPHL/tPLH PARAMETER propagation delay inputs nA to output nY CONDITIONS VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ VCC = 2.5 V; CL = 30 pF; RL = 500 Ω VCC = 2.7 V; CL = 50 pF; RL = 500 Ω VCC = 3.3 V; CL = 50 pF; RL = 500 Ω CI CPD input capacitance power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 outputs enable outputs disabled Notes 1. CPD is used to determine the dynamic power dissipation (PD in ВµW). PD = CPD Г— VCC2 Г— fi Г— N + ОЈ(CL Г— VCC2 Г— fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total switching outputs; ОЈ(CL Г— VCC2 Г— fo) = sum of the outputs. 2. The condition is VI = GND to VCC. DESCRIPTION 74ALVC125 The 74ALVC125 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC125 consists of four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH on pin nOE causes the outputs to assume a high-impedance OFF-state. TYPICAL 2.4 1.7 2.0 1.8 3.5 27 5 ns ns ns ns UNIT pF pF pF 2002 Nov 18 2 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state ORDERING INFORMATION PACKAGE TYPE NUMBER PINS 74ALVC125D 74ALVC125PW FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. PINNING PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1A 1Y 2OE 2A 2Y GND 3Y 3A 3OE 4Y 4A 4OE VCC SYMBOL 1OE data input bus output output enable input (active LOW) data input bus output ground (0 V) bus output data input output enable input (active LOW) bus output data input output enable input (active LOW) supply voltage DESCRIPTION output enable input (active LOW) nA L H X 14 14 PACKAGE SO14 TSSOP14 MATERIAL plastic plastic 74ALVC125 CODE SOT108-1 SOT402-1 OUTPUT nY L H Z 2002 Nov 18 3 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state 74ALVC125 1OE 1A 1Y 2OE 2A 2Y GND 1 2 3 4 5 6 7 MNA226 14 VCC 13 4OE 12 4A handbook, halfpage nA nY 125 11 4Y 10 3OE 9 3A nOE MNA227 8 3Y Fig.1 Pin configuration. Fig.2 Logic diagram (one buffer). handbook, halfpage 2 handbook, halfpage 1A 1OE 2A 2OE 3A 3OE 4A 4OE 1Y 3 2 1 5 EN1 1 3 1 5 2Y 6 6 4 9 8 10 12 11 13 MNA229 MNA228 4 9 10 12 13 3Y 8 4Y 11 Fig.3 IEE/IEC logic symbol. Fig.4 Logic symbol. 2002 Nov 18 4 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO PARAMETER supply voltage input voltage output voltage CONDITIONS 0 VCC = 1.65 to 3.6 V; enable mode 0 VCC = 1.65 to 3.6 V; disable mode 0 VCC = 0 V; Power-down mode Tamb tr, tf operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 3.6 V 0 в€’40 0 0 MIN. 1.65 74ALVC125 MAX. 3.6 3.6 VCC 3.6 3.6 +85 20 10 V V V V V В°C UNIT ns/V ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO PARAMETER supply voltage input diode current input voltage output diode current output voltage VO > VCC or VO < 0 enable mode; notes 1 and 2 disable mode Power-down mode; note 2 IO ICC, IGND Tstg Ptot output source or sink current VCC or GND current storage temperature power dissipation SO package TSSOP package Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation. above 70 В°C derate linearly with 8 mW/K above 60 В°C derate linearly with 5.5 mW/K в€’ в€’ 500 500 mW mW VO = 0 to VCC VI < 0 CONDITIONS в€’ в€’0.5 в€’ в€’0.5 в€’0.5 в€’0.5 в€’ в€’ в€’65 MIN. в€’0.5 MAX. +4.6 в€’50 +4.6 В±50 VCC + 0.5 +4.6 +4.6 В±50 В±100 +150 V mA V mA V V V mA mA В°C UNIT 2002 Nov 18 5 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = в€’40 to +85 В°C VIH HIGH-level input voltage 1.65 to 1.95 0.65 Г— VCC в€’ 2.3 to 2.7 2.7 to 3.6 VIL LOW-level input voltage 2.3 to 2.7 2.7 to 3.6 VOL LOW-level output voltage VI = VIH or VIL IO = 100 ВµA IO = 6 mA IO = 12 mA IO = 18 mA IO = 12 mA IO = 18 mA IO = 24 mA VOH HIGH-level output voltage VI = VIH or VIL IO = в€’100 ВµA IO = в€’6 mA IO = в€’12 mA IO = в€’18 mA IO = в€’12 mA IO = в€’18 mA IO = в€’24 mA ILI IOZ Ioff ICC ∆ICC input leakage current 3-state output OFF-state current power OFF leakage current quiescent supply current additional quiescent supply current per input pin VI = 3.6 V or GND VI = VIH or VIL; VO = 3.6 V or GND; note 2 VI or VO = 3.6 V VI = VCC or GND; IO = 0 VI = VCC в€’ 0.6 V; IO = 0 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 3.0 3.6 3.6 0.0 3.6 3.0 to 3.6 VCC в€’ 0.2 1.25 1.8 1.7 2.2 2.4 2.2 в€’ в€’ в€’ в€’ в€’ в€’ 1.51 2.10 2.01 2.53 2.76 2.68 В±0.1 0.1 В±0.1 0.2 5 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 3.0 в€’ в€’ в€’ в€’ в€’ в€’ в€’ в€’ 0.11 0.17 0.25 0.16 0.23 0.30 1.7 2 в€’ в€’ в€’ в€’ в€’ в€’ в€’ VCC (V) MIN. TYP.(1) 74ALVC125 MAX. UNIT в€’ в€’ в€’ 0.7 0.8 0.2 0.3 0.4 0.6 0.4 0.4 0.55 в€’ в€’ в€’ в€’ в€’ в€’ в€’ В±5 В±10 В±10 10 750 V V V V V V V V V V V V V V V V V V V ВµA ВµA ВµA ВµA ВµA 1.65 to 1.95 в€’ 0.35 Г— VCC V Notes 1. All typical values are measured at Tamb = 25 В°C. 2. For transceivers, the parameter IOZ includes the input leakage current. 2002 Nov 18 6 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state AC CHARACTERISTICS TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = в€’40 to +85 В°C tPHL/tPLH propagation delay input nA to output nY see Figs 5 and 7 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time input nOE to output nY see Figs 6 and 7 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time input nOE to output nY see Figs 6 and 7 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 Note 1. All typical values are measured at Tamb = 25 В°C. AC WAVEFORMS 1.3 1.0 в€’ 1.1 1.4 1.0 в€’ 1.0 1.8 1.0 в€’ 1.4 2.4 1.7 2.0 1.8 3.9 2.2 2.7 1.9 3.9 2.1 2.9 2.7 VCC (V) MIN. TYP.(1) 74ALVC125 MAX. UNIT 5.3 3.2 3.1 2.8 6.4 4.1 4.3 3.5 5.9 3.4 4.0 4.0 ns ns ns ns ns ns ns ns ns ns ns ns handbook, halfpage VI VM GND tPHL VOH tPLH nA input nY output VOL VM MNA230 INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V VM 0.5 Г— VCC 0.5 Г— VCC 1.5 V 1.5 V VCC VCC 2.7 V 2.7 V VI tr = tf ≤ 2.0 ns ≤ 2.0 ns ≤ 2.5 ns ≤ 2.5 ns Fig.5 Input nA to output nY propagation delay times. 2002 Nov 18 7 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state 74ALVC125 handbook, full pagewidth VI nOE input GND tPLZ output LOW-to-OFF OFF-to-LOW VCC VM VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled MNA654 VM tPZL Vx tPZH Vy VM INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V VM 0.5 Г— VCC 0.5 Г— VCC 1.5 V 1.5 V VCC VCC 2.7 V 2.7 V VI tr = tf ≤ 2.0 ns ≤ 2.0 ns ≤ 2.5 ns ≤ 2.5 ns VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.15 V at VCC < 2.7 V; VY = VOH в€’ 0.3 V at VCC ≥ 2.7 V; VY = VOH в€’ 0.15 V at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 3-state enable and disable times. 2002 Nov 18 8 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state 74ALVC125 handbook, full pagewidth VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL MNA616 VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V Definitions for test circuit RL = Load resistor. VI VCC VCC 2.7 V 2.7 V CL 30 pF 30 pF 50 pF 50 pF RL 1 kΩ 500 Ω 500 Ω 500 Ω VEXT tPLH/tPHL tPZH/tPHZ open open open open GND GND GND GND tPZL/tPLZ 2 Г— VCC 2 Г— VCC 6V 6V CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.7 Load circuitry for switching times. 2002 Nov 18 9 Philips Semiconductors Product speciп¬Ѓcation Quad buffer/line driver; 3-state PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm 74ALVC125 SOT108-1 D E A X c y HE v M A Z 14 8 Q A2 A1 pin 1 index Оё Lp 1 e bp 7 w M L detail X (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 Оё 0.010 0.057 inches 0.069 0.004 0.049 Note 0.019 0.0100 0.35 0.014 0.0075 0.34 0.244 0.039 0.050 0.041 0.228 0.016 0.028 0.004 0.012 8 0o o 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 2002 Nov 18 10 Philips Semiconductors Product speciп¬Ѓcation Quad |
