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Architectural improvements boost A72 performance, cut power consumption

 
Electronics News
8 years ago

Architectural improvements boost A72 performance, cut power consumption


Microarchitectural improvements applied in ARM's Cortex-A72 core are said to increase efficiency such that it can deliver the same performance of a Cortex-A15 processor while consuming half the power on a 28nm process. And the company suggests the A72 will consume 75% less power when manufactured on 14/16nm FinFET nodes. 

In a blog post, Brian Jeff, director of product marketing for the Cortex-A cores, said the performance of a Cortex-A15 CPU can be reproduced on the Cortex-A72 processor at reduced frequency and voltage resulting in a dramatic power reduction. "However," he noted, "mobile apps often push the CPU to maximum performance, rather than a specific absolute required level of performance. In this case, a 2.5GHz Cortex-A72 CPU consumes 30 to 35% less power than the 28nm Cortex-A15 processor, whilst still delivering more than twice the peak performance."

The Cortex-A72 microarchitecture features a new branch prediction unit said to reduce overall power consumption, whilst improving performance across a range of benchmarks. The instruction cache has been also redesigned to optimise tag look up. Meanwhile, the decode block has undergone what Jeff calls 'extensive decoder power optimisation'.

In the pipeline's dispatch/retire section, the effective dispatch bandwidth has been increased to a five wide dispatch, offering increased performance, while reducing decode power. Architectural and speculative register files have also been optimised to reduce ports and area.

Lower latency floating point functional units have also been integrated. Jeff noted: "These are very fast floating point latencies, comparable with the latest high performance server and PC CPUs. Floating point latency is important in typical mobile and consumer use cases, where there is commonly a mix of FP and integer work. In these settings, the latency between computation and result is critical. Shorter latencies mean integer instructions waiting on the results of those instructions are less likely to be stalled."

According to ARM, the improvements show an increase of around 25% in SpecFP and SpecFP2006 benchmark scores.

Jeff noted the A72 featured: performance improvements in key areas; generational performance upside across all workload categories; and power efficiency improvements throughout the microarchitecture. The result, he concluded, is a reduced area, lower cost solution.

Author
Graham Pitcher

Source:  www.newelectronics.co.uk


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