In a move which broadens its support for processor core debug, UltraSoC has added Cadence's Tensilica Xtensa family to its UltraDebug package.
"UltraSoC has innovative technology when it comes to SoC debug," said Chris Jones, product marketing group director of the Tensilica division of the IP Group at Cadence. "Its technology helps designers to create competitive products quickly and we're looking forward to working together to solve the SoC debug challenge, which we believe is one of the challenges facing the semiconductor industry today."
Rupert Baines, UltraSoC's CEO, added: "Today's application processors are not optimised to handle the vast range of tasks required in today's advanced consumer products – in particular, datapath processing. Xtensa technology provides a solution to that problem, offloading tasks from the host processor and creating highly optimised multicore SoCs. We're very much in tune with this vision of the SoC and delighted to be working with an industry leader like Cadence to make it happen."
Xtensa enables system architects to create high performance processors and DSPs customised to their application needs. This is said to allow the creation of SoCs in which key tasks are offloaded from the host processor to multiple heterogeneous Xtensa processors.